Team SparXiom

Our team combines expertise in sparse mathematics, high-performance computing and FPGA-based hardware development, with all initial team members currently connected through the University of Warwick ecosystem.


United by a shared belief that sparsity will become a defining paradigm of future AI and scientific computing, our team is developing a new generation of semiconductor IP designed specifically for sparse workloads.


We strive to build a technology company while fostering a long-term culture of research and innovation. As SparXiom grows, we aim to welcome experienced industry leaders, hardware engineers, mathematicians, PhD students and research collaborators who can shape the future of sparse computing and share in the success and impact of the company they help create.

Dr. Nino Pesic

Chief Systems Architect

Inventor of SpAx mathematical framework.

Prof. Gihan Mudalige

Scientific Advisor. HPC: compilers.

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Prof. Ligang He

Scientific Advisor. HPC: AI/GNN.

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Dr. Beniel Thileepan

Lead FPGA Engineer

Registered Office: SparXiom Ltd, Unit 201 F, 60 Frederick Street, Birmingham, B1 3HS, West Midlands, UK.

|   Contact: n.pesic (@) sparxiom.com   |   Company registered in England and Wales no. 17412379   |

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